3.2.4.9.2. RSC Decoder parameters

3.2.4.9.2.1. --dec-type, -D

Type

text

Allowed values

BCJR CHASE ML VITERBI PLVA

Examples

--dec-type BCJR

Select the decoder algorithm.

Description of the allowed values:

Value	Description
BCJR	Select the BCJR algorithm from [Rsc-BCJR74].
VITERBI	Select the Viterbi algorithm from [Rsc-Vit67].
PLVA	Select the PLVA algorithm from [Rsc-SS94].
CHASE	See the common --dec-type, -D parameter.
ML	See the common --dec-type, -D parameter.

3.2.4.9.2.2. --dec-implem

Type

text

Allowed values

GENERIC STD FAST VERY_FAST

Default

STD

Examples

--dec-implem FAST

Select the implementation of the decoder algorithm.

Description of the allowed values:

Value	Description
GENERIC	Select the generic BCJR implementation that can decode any trellis (slow compared to the other implementations).
STD	Select the STD BCJR implementation, specialized for the {013,015} polynomials (c.f. the --enc-poly parameter).
FAST	Select the fast BCJR implementation, specialized for the {013,015} polynomials (c.f. the --enc-poly parameter).
VERY_FAST	Select the very fast BCJR implementation, specialized for the {013,015} polynomials (c.f. the --enc-poly parameter).

3.2.4.9.2.3. --dec-simd

Type

text

Allowed values

INTER INTRA

Examples

--dec-simd INTER

Select the SIMD strategy.

Description of the allowed values:

Value	Description
INTER	Select the inter-frame strategy, only available for the BCJR STD, FAST and VERY_FAST implementation (see [Rsc-CTL+16]).
INTRA	Select the intra-frame strategy, only available for the BCJR STD and FAST implementations (see [Rsc-WWY+13]).

Note

In the intra-frame strategy, SIMD units process several LLRs in parallel within a single frame decoding. In the inter-frame strategy, SIMD units decodes several independent frames in parallel in order to saturate the SIMD unit. This approach improves the throughput of the decoder but requires to load several frames before starting to decode, increasing both the decoding latency and the decoder memory footprint.

Note

When the inter-frame SIMD strategy is set, the simulator will run with the right number of frames depending on the SIMD length. This number of frames can be manually set with the --sim-inter-fra, -F parameter. Be aware that running the simulator with the --sim-inter-fra, -F parameter set to 1 and the --dec-simd parameter set to INTER will completely be counterproductive and will lead to no throughput improvements.

3.2.4.9.2.4. --dec-max

Type

text

Allowed values

MAXS MAXL MAX

Examples

--dec-max MAX

Select the approximation of the \(\max^*\) operator used in the trellis decoding.

Description of the allowed values:

Value	Description
MAXS	\(\max^*(a,b) = \max(a,b) + \log(1 + \exp(-|a - b|))\).
MAXL	\(\max^*(a,b) \approx \max(a,b) + \max(0, 0.301 - (0.5 |a - b|))\).
MAX	\(\max^*(a,b) \approx \max(a,b)\).

MAXS for Max Star is the exact \(\max^*\) operator. MAXL for Max Linear is a linear approximation of the \(\max^*\) function. MAX for Max is the simplest \(\max^*\) approximation with only a \(\max\) function.

Note

The BCJR with the \(\max\) approximation is also called the max-log-MAP algorithm.

3.2.4.9.2.5. --dec-lists, -L

Type

integer

Default

8

Examples

--dec-lists 32

Set the number of lists to maintain in the PLVA decoder.

3.2.4.9.2.6. References

Rsc-BCJR74

L. Bahl, J. Cocke, F. Jelinek, and J. Raviv. Optimal decoding of linear codes for minimizing symbol error rate (corresp.). IEEE Transactions on Information Theory (TIT), 20(2):284–287, March 1974. doi:10.1109/TIT.1974.1055186.

Rsc-CTL+16

A. Cassagne, T. Tonnellier, C. Leroux, B. Le Gal, O. Aumage, and D. Barthou. Beyond Gbps turbo decoder on multi-core CPUs. In International Symposium on Turbo Codes and Iterative Information Processing (ISTC), 136–140. IEEE, September 2016. doi:10.1109/ISTC.2016.7593092.

Rsc-SS94

N. Seshadri and C.-E.W. Sundberg. List viterbi decoding algorithms with applications. IEEE Transactions on Communications, 42(234):313–323, 1994. doi:10.1109/TCOMM.1994.577040.

Rsc-Vit67

A. Viterbi. Error bounds for convolutional codes and an asymptotically optimum decoding algorithm. IEEE Transactions on Information Theory, 13(2):260–269, 1967. doi:10.1109/TIT.1967.1054010.

Rsc-WWY+13

M. Wu, G. Wang, B. Yin, C. Studer, and J. R. Cavallaro. HSPA+/LTE-A turbo decoder on GPU and multicore CPU. In Asilomar Conference on Signals, Systems, and Computers (ACSSC), 824–828. IEEE, November 2013. doi:10.1109/ACSSC.2013.6810402.